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1

Two techniques for improving performance on bus-based multiprocessors

Craig Anderson, Jean-Loup Baer

Journal:

Future Generation Computer Systems

Year:

1995

Language:

english

File:

PDF, 1.34 MB

english, 1995

2

The structure and performance of interpreters

Romer, Theodore H., Lee, Dennis, Voelker, Geoffrey M., Wolman, Alec, Wong, Wayne A., Baer, Jean-Loup, Bershad, Brian N., Levy, Henry M.

Journal:

ACM SIGOPS Operating Systems Review

Year:

1996

Language:

english

File:

PDF, 1.11 MB

english, 1996

3

Scaling shared-bus multiprocessors with multiple buses and shared caches: a performance study

Jonathan Bertoni, Jean-Loup Baer, Wen-Hann Wang

Journal:

Microprocessors and Microsystems

Year:

1992

Language:

english

File:

PDF, 1.20 MB

english, 1992

4

[ACM Press the 22nd annual international symposium - S. Margherita Ligure, Italy (1995.06.22-1995.06.24)] Proceedings of the 22nd annual international symposium on Computer architecture - ISCA '95 - Instruction cache fetch policies for speculative execution

Lee, Dennis, Baer, Jean-Loup, Calder, Brad, Grunwald, Dirk

Year:

1995

Language:

english

File:

PDF, 1.09 MB

english, 1995

5

Efficient trace-driven simulation methods for cache performance analysis

Wang, Wen-Hann, Baer, Jean-Loup

Journal:

ACM Transactions on Computer Systems

Year:

1991

Language:

english

File:

PDF, 1.21 MB

english, 1991

6

An economical solution to the cache coherence problem

Archibald, James, Baer, Jean Loup

Journal:

ACM SIGARCH Computer Architecture News

Year:

1984

Language:

english

File:

PDF, 712 KB

english, 1984

7

[IEEE 1994 International Conference on Parallel Processing (ICPP'94) - North Carolina State University, NC, USA (1994.08.15-1994.08.19)] 1994 International Conference on Parallel Processing (ICPP'94) - A Parallel Trace-driven Simulator: Implementation and Performance

Qin, Xiaohan, Baer, Jean-loup

Year:

1994

Language:

english

File:

PDF, 397 KB

english, 1994

8

[ACM Press the 19th annual international symposium - Queensland, Australia (1992.05.19-1992.05.21)] Proceedings of the 19th annual international symposium on Computer architecture - ISCA '92 - A performance study of memory consistency models

Zucker, Richard N., Baer, Jean-Loup

Year:

1992

Language:

english

File:

PDF, 1.11 MB

english, 1992

9

[Advances in Parallel Computing] High Performance Computing - Technology, Methods and Applications Volume 10 || Trends in High-Performance Computer Architecture

Baer, Jean-Loup

Year:

1995

Language:

english

File:

PDF, 1.12 MB

english, 1995

10

[ACM Press 25 years of the international symposia - Barcelona, Spain (1998.06.27-1998.07.02)] 25 years of the international symposia on Computer architecture (selected papers) - ISCA '98 - Retrospective: on the inclusion properties for multi-level cache hierarchies

Baer, Jean-Loup, Wang, Wen-Hann

Year:

1998

Language:

english

File:

PDF, 194 KB

english, 1998

11

[ACM Press the 4th international conference - Amsterdam, The Netherlands (1990.06.11-1990.06.15)] Proceedings of the 4th international conference on Supercomputing - ICS '90 - An efficient caching support for critical sections in large-scale shared-memory multiprocessors

Min, Sang Lyul, Baer, Jean-Loup, Kim, Hyoung-Joo

Year:

1990

Language:

english

File:

PDF, 1.33 MB

english, 1990

12

The I/O Performance of Multiway Mergesort and Tag Sort

Kwan, Sai Choi, Baer, Jean-Loup

Journal:

IEEE Transactions on Computers

Year:

1985

Language:

english

File:

PDF, 1.21 MB

english, 1985

13

Cache coherence protocols: evaluation using a multiprocessor simulation model

Archibald, James, Baer, Jean-Loup

Journal:

ACM Transactions on Computer Systems

Year:

1986

Language:

english

File:

PDF, 1.70 MB

english, 1986

14

Efficient trace-driven simulation method for cache performance analysis

Wang, Wen-Hann, Baer, Jean-Loup

Journal:

ACM SIGMETRICS Performance Evaluation Review

Year:

1990

Language:

english

File:

PDF, 995 KB

english, 1990

15

Microprocessor Architecture (From Simple Pipelines to Chip Multiprocessors) || Multiprocessors

Baer, Jean-Loup

Year:

2009

Language:

english

File:

PDF, 313 KB

english, 2009

16

Microprocessor Architecture (From Simple Pipelines to Chip Multiprocessors) || The Basics

Baer, Jean-Loup

Year:

2009

File:

PDF, 406 KB

2009

17

Microprocessor Architecture (From Simple Pipelines to Chip Multiprocessors) || Front-End: Branch Prediction, Instruction Fetching, and Register Renaming

Baer, Jean-Loup

Year:

2009

File:

PDF, 438 KB

2009

18

[ACM Press 25th Anniversary International Conference - Munich, Germany (2014.06.10-2014.06.13)] 25th Anniversary International Conference on Supercomputing Anniversary Volume - - Characterizing processor architectures for programmable network interfaces

Crowley, Patrick, Fluczynski, Marc E., Baer, Jean-Loup, Bershad, Brian N.

Year:

2014

Language:

english

File:

PDF, 1.38 MB

english, 2014

19

Microprocessor Architecture (From Simple Pipelines to Chip Multiprocessors) || Back-End: Instruction Scheduling, Memory Access Instructions, and Clusters

Baer, Jean-Loup

Year:

2009

File:

PDF, 343 KB

2009

20

Microprocessor Architecture (From Simple Pipelines to Chip Multiprocessors) || The Cache Hierarchy

Baer, Jean-Loup

Year:

2009

File:

PDF, 733 KB

2009

21

Microprocessor Architecture (From Simple Pipelines to Chip Multiprocessors) || Multithreading and (Chip) Multiprocessing

Baer, Jean-Loup

Year:

2009

File:

PDF, 879 KB

2009

22

Microprocessor Architecture (From Simple Pipelines to Chip Multiprocessors) || Current Limitations and Future Challenges

Baer, Jean-Loup

Year:

2009

File:

PDF, 145 KB

2009

23

CACHE-BASED DATA DISTRIBUTION CONSTRAINED SCHEDULING

MIN, SANG L., NAM, JAE H., PARK, MYUNG S., BAER, JEAN-LOUP

Journal:

International Journal of High Speed Computing

Year:

1994

Language:

english

File:

PDF, 752 KB

english, 1994

24

Microprocessor Architecture (From Simple Pipelines to Chip Multiprocessors) || Bibliography

Baer, Jean-Loup

Year:

2009

File:

PDF, 87 KB

2009

25

[ACM Press the 1991 ACM/IEEE conference - Albuquerque, New Mexico, United States (1991.11.18-1991.11.22)] Proceedings of the 1991 ACM/IEEE conference on Supercomputing - Supercomputing '91 - An effective on-chip preloading scheme to reduce data access penalty

Baer, Jean-Loup, Chen, Tien-Fu

Year:

1991

Language:

english

File:

PDF, 1.12 MB

english, 1991

26

[ACM Press the 1999 ACM SIGMETRICS international conference - Atlanta, Georgia, United States (1999.05.01-1999.05.04)] Proceedings of the 1999 ACM SIGMETRICS international conference on Measurement and modeling of computer systems - SIGMETRICS '99 - On the use of trace sampling for architectural studies of desktop applications

Crowley, Patrick, Baer, Jean-Loup

Year:

1999

Language:

english

File:

PDF, 256 KB

english, 1999

27

Query costs in HB(1) trees versus 2–3 trees

Ahmed S. Zaki, Jean Loup Baer

Journal:

International Journal of Parallel Programming

Year:

1981

Language:

english

File:

PDF, 625 KB

english, 1981

28

[ACM Press the 1997 ACM SIGMETRICS international conference - Seattle, Washington, United States (1997.06.15-1997.06.18)] Proceedings of the 1997 ACM SIGMETRICS international conference on Measurement and modeling of computer systems - SIGMETRICS '97 - A performance evaluation of cluster architectures

Qin, Xiaohan, Baer, Jean-Loup

Year:

1997

Language:

english

File:

PDF, 1.57 MB

english, 1997

29

A performance evaluation of cluster architectures

Qin, Xiaohan, Baer, Jean-Loup

Journal:

ACM SIGMETRICS Performance Evaluation Review

Year:

1997

Language:

english

File:

PDF, 1.57 MB

english, 1997

30

Effective hardware-based data prefetching for high-performance processors

Tien-Fu Chen, Jean-Loup Baer

Journal:

IEEE Transactions on Computers

Year:

1995

Language:

english

File:

PDF, 1.60 MB

english, 1995

31

[ACM Press the 11th annual international symposium - Not Known (1984..-..)] Proceedings of the 11th annual international symposium on Computer architecture - ISCA '84 - An economical solution to the cache coherence problem

Archibald, James, Baer, Jean Loup

Year:

1984

Language:

english

File:

PDF, 712 KB

english, 1984

32

Instruction cache fetch policies for speculative execution

Lee, Dennis, Baer, Jean-Loup, Calder, Brad, Grunwald, Dirk

Journal:

ACM SIGARCH Computer Architecture News

Year:

1995

Language:

english

File:

PDF, 1.09 MB

english, 1995

33

The structure and performance of interpreters

Romer, Theodore H., Lee, Dennis, Voelker, Geoffrey M., Wolman, Alec, Wong, Wayne A., Baer, Jean-Loup, Bershad, Brian N., Levy, Henry M.

Journal:

ACM SIGPLAN Notices

Year:

1996

Language:

english

File:

PDF, 1.11 MB

english, 1996

34

Models for the design, simulation, and performance of distributed-function architecture

Baer, Jean-Loup

Journal:

Year:

1974

Language:

english

File:

PDF, 4.38 MB

english, 1974

35

[ACM Press the seventh international conference - Cambridge, Massachusetts, United States (1996.10.01-1996.10.04)] Proceedings of the seventh international conference on Architectural support for programming languages and operating systems - ASPLOS-VII - The structure and performance of interpreters

Romer, Theodore H., Lee, Dennis, Voelker, Geoffrey M., Wolman, Alec, Wong, Wayne A., Baer, Jean-Loup, Bershad, Brian N., Levy, Henry M.

Year:

1996

Language:

english

File:

PDF, 1.11 MB

english, 1996

36

Reducing memory latency via non-blocking and prefetching caches

Chen, Tien-Fu, Baer, Jean-Loup

Journal:

ACM SIGPLAN Notices

Year:

1992

Language:

english

File:

PDF, 1.30 MB

english, 1992

37

Multilevel cache hierarchies: Organizations, protocols, and performance

Jean-Loup Baer, Wen-Hann Wang

Journal:

Journal of Parallel and Distributed Computing

Year:

1989

Language:

english

File:

PDF, 1.42 MB

english, 1989

38

An efficient caching support for critical sections in large-scale shared-memory multiprocessors

Min, Sang Lyul, Baer, Jean-Loup, Kim, Hyoung-Joo

Journal:

ACM SIGARCH Computer Architecture News

Year:

1990

Language:

english

File:

PDF, 1.33 MB

english, 1990

39

[ACM Press the 14th international conference - Santa Fe, New Mexico, United States (2000.05.08-2000.05.11)] Proceedings of the 14th international conference on Supercomputing - ICS '00 - Characterizing processor architectures for programmable network interfaces

Crowley, Patrick, Fluczynski, Marc E., Baer, Jean-Loup, Bershad, Brian N.

Year:

2000

Language:

english

File:

PDF, 962 KB

english, 2000

40

Execution characteristics of desktop applications on Windows NT

Lee, Dennis C., Crowley, Patrick J., Baer, Jean-Loup, Anderson, Thomas E., Bershad, Brian N.

Journal:

ACM SIGARCH Computer Architecture News

Year:

1998

Language:

english

File:

PDF, 1.36 MB

english, 1998

41

[ACM Press the 3rd annual symposium - Not Known (1976.01.19-1976.01.21)] Proceedings of the 3rd annual symposium on Computer architecture - ISCA '76 - A model of interference in a shared resource multiprocessor

Jensen, John E., Baer, Jean-Loup

Year:

1976

Language:

english

File:

PDF, 522 KB

english, 1976

42

[ACM Press 25 years of the international symposia - Barcelona, Spain (1998.06.27-1998.07.02)] 25 years of the international symposia on Computer architecture (selected papers) - ISCA '98 - On the inclusion properties for multi-level cache hierarchies

Baer, Jean-Loup, Wang, Wen-Hann

Year:

1998

Language:

english

File:

PDF, 856 KB

english, 1998

43

A performance study of memory consistency models

Zucker, Richard N., Baer, Jean-Loup

Journal:

ACM SIGARCH Computer Architecture News

Year:

1992

Language:

english

File:

PDF, 1.11 MB

english, 1992

44

A model of interference in a shared resource multiprocessor

Jensen, John E., Baer, Jean-Loup

Journal:

ACM SIGARCH Computer Architecture News

Year:

1976

Language:

english

File:

PDF, 522 KB

english, 1976

45

[ACM Press the 1990 ACM SIGMETRICS conference - Univ. of Colorado, Boulder, Colorado, United States (1990..-..)] Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems - SIGMETRICS '90 - Efficient trace-driven simulation method for cache performance analysis

Wang, Wen-Hann, Baer, Jean-Loup

Year:

1990

Language:

english

File:

PDF, 995 KB

english, 1990

46

High-Performance Computer Architectureby Harold S. Stone

Review by: Jean-Loup Baer

Journal:

American Scientist

Year:

1988

Language:

english

File:

PDF, 347 KB

english, 1988

47

Microprocessor Architecture (From Simple Pipelines to Chip Multiprocessors) || Preface

Baer, Jean-Loup

Year:

2009

File:

PDF, 55 KB

2009

48

Microprocessor Architecture (From Simple Pipelines to Chip Multiprocessors) || Introduction

Baer, Jean-Loup

Year:

2009

File:

PDF, 689 KB

2009

49

[ACM Press the fifth international conference - Boston, Massachusetts, United States (1992.10.12-1992.10.15)] Proceedings of the fifth international conference on Architectural support for programming languages and operating systems - ASPLOS-V - Reducing memory latency via non-blocking and prefetching caches

Chen, Tien-Fu, Baer, Jean-Loup

Year:

1992

Language:

english

File:

PDF, 1.30 MB

english, 1992

50

On the use of trace sampling for architectural studies of desktop applications

Crowley, Patrick, Baer, Jean-Loup

Journal:

ACM SIGMETRICS Performance Evaluation Review

Year:

1999

Language:

english

File:

PDF, 256 KB

english, 1999

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